@inproceedings{lfss-aashl-26,
  author = {Leandro Lanzieri and Goerschwin Fey and Holger Schlarb and Thomas C. Schmidt},
  booktitle = {Proc. of 31st IEEE European Test Symposium},
  title = {{Auto-Generating Ageing Self-Tests with Hardware in the Loop for Commercial Microcontrollers}},
  year = {2026},
  month = {May},
  publisher = {IEEE Press},
  abstract = {Safety-critical systems increasingly deploy microcontrollers, for which the monitoring of hardware ageing is vital to avoid unexpected malfunctioning. In previous work, we introduced a deployable software-based method for ageing monitoring in commercial microcontrollers that requires no architecture-level knowledge of the devices, as it estimates the maximum error-free operating frequency using variable-length timing windows. While effective, manually constructing optimal computing payloads for self-tests remains challenging and can limit coverage of critical paths or subsystems specific to the hardware. In this paper, we complement our technique with an automated generation of the self-test firmware. We explore several approaches for generating computing payloads using hardware in the loop (HiL) evaluation on commercial microcontrollers, including a pure random generation and evolutionary strategies. In the evolutionary approach, we investigate two mutation mechanisms: random selection, and contextual bandit algorithms. Our evaluations on real hardware and surrogate hardware models show the impact of evaluation budget and algorithm selection on the effectiveness of automatic self-test generation. Results reveal that random generation is well suited to reduced HiL explorations, while evolutionary strategies benefit from extended evaluations. Our HiL-based technique is able to produce firmwares with up to double the degradation sensitivity as the functional tests provided by the vendor.},
  doi = {10.1109/ETS69887.2026.11591921},
  location = {Chania, Greece},
  theme = {mint|iot},
  url = {https://doi.org/10.1109/ETS69887.2026.11591921},
}